Configure: set cache line size for loongarch64

Section 8.2 table 54, registers 0x11 - 0x14 (2^6 = 64 bytes)
<https://loongson.github.io/LoongArch-Documentation/Loongson-3A5000-usermanual-EN.html#instruction-set-features-implemented-in-3a5000>

There is no intent to cover 32-bit LoongArch which acceptably falls
through to the default.

diff --git a/auto/os/conf b/auto/os/conf
index bb0ce4ef2b9cc4a9bd2761bd2f3d3d55f01a5648..f241d8199212c8021c1eb24458869646918dfe32 100644 (file)
--- a/auto/os/conf
+++ b/auto/os/conf
@@ -130,6 +130,11 @@ case "$NGX_MACHINE" in
         NGX_MACH_CACHE_LINE=256
     ;;
 
+    loongarch64)
+        have=NGX_ALIGNMENT value=16 . auto/define
+        NGX_MACH_CACHE_LINE=64
+    ;;
+
     *)
         have=NGX_ALIGNMENT value=16 . auto/define
         NGX_MACH_CACHE_LINE=32