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authorAndres Freund <andres@anarazel.de>2014-09-26 02:44:44 +0200
committerAndres Freund <andres@anarazel.de>2014-09-26 02:44:44 +0200
commitf18cad944911f05ad2e876af67362e28584b3c61 (patch)
treeaffbfd609e2fea1ea82392416284530c6491a4c1
parent88bcdf9da5aa67da11ada0921703432ef2b7c21c (diff)
downloadpostgresql-f18cad944911f05ad2e876af67362e28584b3c61.tar.gz
postgresql-f18cad944911f05ad2e876af67362e28584b3c61.zip
Fix atomic ops inline x86 inline assembly for older 32bit gccs.
Some x86 32bit versions of gcc apparently generate references to the nonexistant %sil register when using when using the r input constraint, but not with the =q constraint. The latter restricts allocations to a/b/c/d which should all work.
-rw-r--r--src/include/port/atomics/arch-x86.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/include/port/atomics/arch-x86.h b/src/include/port/atomics/arch-x86.h
index b2127add36c..11a891c865d 100644
--- a/src/include/port/atomics/arch-x86.h
+++ b/src/include/port/atomics/arch-x86.h
@@ -175,7 +175,7 @@ pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
" lock \n"
" cmpxchgl %4,%5 \n"
" setz %2 \n"
-: "=a" (*expected), "=m"(ptr->value), "=r" (ret)
+: "=a" (*expected), "=m"(ptr->value), "=q" (ret)
: "a" (*expected), "r" (newval), "m"(ptr->value)
: "memory", "cc");
return (bool) ret;
@@ -212,7 +212,7 @@ pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr,
" lock \n"
" cmpxchgq %4,%5 \n"
" setz %2 \n"
-: "=a" (*expected), "=m"(ptr->value), "=r" (ret)
+: "=a" (*expected), "=m"(ptr->value), "=q" (ret)
: "a" (*expected), "r" (newval), "m"(ptr->value)
: "memory", "cc");
return (bool) ret;