diff options
Diffstat (limited to 'src/backend/storage/ipc')
-rw-r--r-- | src/backend/storage/ipc/procarray.c | 6 | ||||
-rw-r--r-- | src/backend/storage/ipc/sinval.c | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/backend/storage/ipc/procarray.c b/src/backend/storage/ipc/procarray.c index 68cc6edd092..b4b4613a8c4 100644 --- a/src/backend/storage/ipc/procarray.c +++ b/src/backend/storage/ipc/procarray.c @@ -287,7 +287,7 @@ ProcArrayAdd(PGPROC *proc) /* * Keep the procs array sorted by (PGPROC *) so that we can utilize * locality of references much better. This is useful while traversing the - * ProcArray because there is a increased likelihood of finding the next + * ProcArray because there is an increased likelihood of finding the next * PGPROC structure in the cache. * * Since the occurrence of adding/removing a proc is much lower than the @@ -2061,7 +2061,7 @@ GetOldestSafeDecodingTransactionId(void) * the result is somewhat indeterminate, but we don't really care. Even in * a multiprocessor with delayed writes to shared memory, it should be certain * that setting of delayChkpt will propagate to shared memory when the backend - * takes a lock, so we cannot fail to see an virtual xact as delayChkpt if + * takes a lock, so we cannot fail to see a virtual xact as delayChkpt if * it's already inserted its commit record. Whether it takes a little while * for clearing of delayChkpt to propagate is unimportant for correctness. */ @@ -3500,7 +3500,7 @@ KnownAssignedXidsRemovePreceding(TransactionId removeXid) /* * Mark entries invalid starting at the tail. Since array is sorted, we - * can stop as soon as we reach a entry >= removeXid. + * can stop as soon as we reach an entry >= removeXid. */ tail = pArray->tailKnownAssignedXids; head = pArray->headKnownAssignedXids; diff --git a/src/backend/storage/ipc/sinval.c b/src/backend/storage/ipc/sinval.c index 67ec5152a84..7c95f4c6a95 100644 --- a/src/backend/storage/ipc/sinval.c +++ b/src/backend/storage/ipc/sinval.c @@ -33,7 +33,7 @@ uint64 SharedInvalidMessageCounter; * through a cache reset exercise. This is done by sending * PROCSIG_CATCHUP_INTERRUPT to any backend that gets too far behind. * - * The signal handler will set a interrupt pending flag and will set the + * The signal handler will set an interrupt pending flag and will set the * processes latch. Whenever starting to read from the client, or when * interrupted while doing so, ProcessClientReadInterrupt() will call * ProcessCatchupEvent(). |